Data Re-org Meeting Minutes

June 26^th, 1998, Engineering Research Center, Mississippi State University, Starkville, MS.

Attendance:

Anthony Skjellum, Mississippi State University

Darwin E. Ammala, MPI Software Technology, Inc.

Steve Paavola, Sky Computers Inc.

Dennis Cottel, SPAWAR SYSCEN San Diego

James Lebak, MIT/ Lincoln Labs

Joe Fogler, MHPCC/AHPCC

Clay Taylor Jr., MPI Software Technology, Inc.

Eric Holbrook, MPI Software Technology, Inc.

George Crawford, MPI Software Technology, Inc.

Diane Mosser-Wooley, Mississippi State University.

Tony Skjellum opened the meeting.

The MITRE Corner Turn Benchmark was discussed. It implements the MPI All to All collective call which implies a high overhead cost. Efforts to streamline the performance were discussed and incorporated into the document.

A no cost extension to the end of 1998 was granted. For 1999, funding could be picked back up.

A discussion of changes to the document were led by James Lebak and Darwin Ammala. Jon Greene’s work previously in Ch. 4 was move to Ch’s 2 and 3. The discussion on early binding was retained. All members of the Data Re-org group are urged to collect their favorite computing libraries for inclusion in the comparison matrix as appendix C in the document. Dennis’s e-mail with an example of an API, should one be derived as a result of this group appears as appendix D of the revised document.

Joe Fogler raised the question of addressing an API for indexing Genetical representations in tree form, and list directed representation; also includes load balancing, effects of shadows, view angle changes tiles etc. These would be useful in parallel computer vision work.

Tony brought up another potential area to braoden the scope of the effort – sparse matrix redistribution; achievements in this area are needed first. The original sponsor wanted dense data cubes.

The consensus of the group wants to handle dense case first, then handle others in version 1.1 et al.

Joe will write a short synopsis of the problem.,

Other thoughts: parallel visualization and rendering., Target detection is like a sparse matirx -

N body simulation applies.

Address acceleration hardware for corner turns. Provide suggestions for accel hardware.

Write a paragraph in issues about this.

Tony also raised the question of the role of hardware accelerators – adaptive, or ‘smart’ non adaptive hardware. How do we avoid the user visibility of the actual reorganization mechanics.

Steve Paavola pointed out that hardware dictates of a local transform

Clay Taylor : proposed hardware abstraction be devised, the existing ones must be supported, by not be a constraint. .Allow for quality of service and predictability.

We should write a anticipated customer description.

Discussion of the number of dimensions considered followed.

The table in the document should be extended to 5 dimensions from 3 - adding time, and multi spectral

Nathan Doss will spearhead specific hardware accelerators etc.

Clay mentioned the web page Alaska SAR corner turn memory module,

Steve mentioned that sometimes the hardware does not scale well, and hardware exists to avoid local memcpy calls.

Tony mentioned predictable caches technology as another consideration.

Texture memory, rendering, solid geometry were mentioned by someone.

Dennis Cottel, and Tony summarized that anything (hardware etc.) done locally would help the re-org effort.

Dennis mentioned that the page 2, data descriptor does not necessarily include mapping.

James pointed out that the descriptions of page 4 should match discussion. Maybe data access object is not a good name. Some editing is required. Should be able to take 2 descriptions, a transfer object can be defined. This whole discussion should be moved to the chapter introduction.

Discussion of the MITRE Corner turn benchmark:

It is primarily used to measure bisection bandwidth the data is 2 dimensional and a 1 dimension array of processors is used, accounts for both local and global data organization problems.

DMA striding burns dram DMA cycles, not a problem with SRAM.

Other classes of problems not addressed by the benchmark.

Changes size everytime, iteratively

SAR problem, multi corner turns, data reduction,

small number of modes can be precomputed, early binding.

Missed osme description of functions and how they are related. Jon Green’s notes of prior meeting are missing from the document.

Tony: n group oriented parallel computing

Steve: rotation drinking from fire hose,

Steve; knowing which slices of matrix are being worked on, sent

Dennis, downstream and upstream ports being related.

James, each node doesn’t have enough time to work, so each node works a little, assembly lining

too much coarse grain diminishes returns. These mode of pipeline hides effects of latency.

Parallelism is bad for transposes.

Discussion of Dennis’ Example in appendix D.

It needs early binding semantics, and a discussion on transfer objects.

Tony asked if we should consider this a meta-API for now, the meta can be dropped later as this takes shape.

Discussion of the ‘pipeline’ portion of Dennis’ example:

A configuration,, is needed for this design, if it is a disk file the disk I/O implies performance costs. A collective operation is an option. Great care is needed in how this is carried out. Do we really want to impose all to all if unnecessary?

Diane Mosser-Wooley gave a talk on the ISO API Guidelines.

A General Discussion of the Document followed.

More examples and illustrations are needed e.g., "overlap", "block-cyclic" etc.

James will contact Paul Harmon about what other things could be included in the document.

To pursue a characteristic table concept was raised.

If the objects in Dennis’ examples are opaque, we need to define accessor functions. They will be in the document next time, as well as round robin scheduling, we need to exchange these concepts via e-mail. (Editor’s note, they are not in this version of the document)..

Nathan: ESAN Embedded System Area Network, has a net switch like behavior, lots of memory. 2 processes, data piped in and out, control network pumps things to different places. You address data to it and the control net routes it, no addressing of outgoing data is done. Not good for dynamic routing, but the switch does transpose and distribution. . It is used in Radar systems, currently testing and development – Aegis radar system.

Switch knows where data came from, where it’s going, it is time based real-time, scheduled data switches). Shared memory inside and message passing outside. Event order driven. Can be viewed as an enabler for single computer spaced, programmable routers etc.

Next meeting: in DC, meet formally or informally.

Available future meetings.

12-15 December, 2 days RT, .5 days DR.

28-30 October 3 days rt, 1 day dr in Boston (Lincoln Labs, MITRE or Mercury)

23-25 Septermber, HPAC. in boston

22-24 July with RT meeting in Arlington

Future Document Draft Dates:

July 21, Aug 21, Sep 21, Oct 21, Dec 11.